Let's Design and Build a (mostly) Digital Theremin!

[dewster] I had the idea that quadrature phase delay could be introduced by the 6800pF caps rather than a single capacitor at the output.  The motivation here was to keep the current mirror gain as high as possible, and indeed you can see from the above that it provides a pretty good square wave going into the Vsense inverter input, and the phase is good.  The delay of course varies with inductor value, unlike the integrating approach.

I believe this 90 degrees shift is similar to RC filter.
Not only changing of inductor, but as well hand movement would change the phase delay introduced by it.
Probably it makes sense to try improving integrator approach which always provide 90 degrees shift?

[dewster] The thing is, tapping off of the antenna with a capacitive divider is really pure, and the LC gain (i.e. Q) at that point is enormous, so by intuition alone it's rather easy to see why it is likely the most optimal solution so far, and for this approach - i.e. squaring up the sine wave and using that edge timing digitally.  The most optimal in an absolute sense would likely be high speed AD conversion and some sort of best fit procedure in the FPGA.

Don't you consider using of comparator convert low amplitude sine to square?

"I believe this 90 degrees shift is similar to RC filter.  Not only changing of inductor, but as well hand movement would change the phase delay introduced by it.  Probably it makes sense to try improving integrator approach which always provide 90 degrees shift?"  - Buggins

I agree, though the integrator approach has a lot of gain associated with it, while the C divider is generally knocking things down.  On my breadboard it looks on the scope like there's a lot of Vcc and ground noise injected into the sensing side from the drive side, which is likely the source of a lot of the phase noise and bobble.  Having a lot of gain probably exacerbates this.  It's too bad higher voltages aren't easily available on the AFE, that would make higher voltage drive easier and would give more headroom for the analog sensing.

"Don't you consider using of comparator convert low amplitude sine to square?"

You have a point, AHC, LVU, and LVCU threshold voltages tend to be fairly well centered for the batches I've purchased, but this perhaps too much of an ill-specified parameter to rely too heavily.  Though there are other issues, such as input capacitance temperature dependence, which is never specified for things like op-amps and perhaps comparators as well.

A circuit I've been thinking about from the very beginning would be one that doesn't attenuate the antenna voltage, but only "looks at" a the small window of 0 to 3.3V, and doesn't significantly load the antenna or otherwise introduce phase shift at the sense output.  This would give a really sharp edge by employing the full LC voltage gain.  But a small capacitor tied to diodes (could be ESD diodes) unfortunately gives almost 90 degrees of phase shift here.